CVE-2024-26761: cxl/pci: Fix disabling memory if DVSEC CXL Range does not match a CFMWS window

Severity: medium (CVSS 5.5 v3.1)
Exploited in the wild: not listed in CISA KEV
EPSS: 0.2% probability of exploitation in the next 30 days
Public exploit or detection template: none known
Published: 2024-04-03 · updated 2026-06-17

Description

In the Linux kernel, the following vulnerability has been resolved: cxl/pci: Fix disabling memory if DVSEC CXL Range does not match a CFMWS window The Linux CXL subsystem is built on the assumption that HPA == SPA. That is, the host physical address (HPA) the HDM decoder registers are programmed with are system physical addresses (SPA). During HDM decoder setup, the DVSEC CXL range registers (cxl-3.1, 8.1.3.8) are checked if the memory is enabled and the CXL range is in a HPA window that is described in a CFMWS structure of the CXL host bridge (cxl-3.1, 9.18.1.3). Now, if the HPA is not an SPA, the CXL range does not match a CFMWS window and the CXL memory range will be disabled then. The HDM decoder stops working which causes system memory being disabled and further a system hang during HDM decoder initialization, typically when a CXL enabled kernel boots. Prevent a system hang and do not disable the HDM decoder if the decoder's CXL range is not found in a CFMWS window. Note the change only fixes a hardware hang, but does not implement HPA/SPA translation. Support for this can be added in a follow on patch series.

Affected products

Linux kernel: from 5.19 before 6.1.80; from 6.2 before 6.6.19; from 6.7 before 6.7.7; 6.8-rc1, 6.8-rc2, 6.8-rc3, 6.8-rc4, 6.8-rc5 — fixed in 6.1.80, 6.6.19, 6.7.7

How to fix

Upgrade to a fixed version: Linux kernel 6.1.80, 6.6.19, 6.7.7. Check the vendor advisory for mitigations.

References

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