What’s Vulnerable › Vulnerabilities
CVE-2024-30212: Microchip Harmony 3 Core library allows read and write access to RAM via a SCSI READ or WRITE command
- Severity: high (CVSS 7.0 v4.0)
- Exploited in the wild: not listed in CISA KEV
- EPSS: 0.6% probability of exploitation in the next 30 days
- Public exploit or detection template: none known
- Published: 2024-05-28 · updated 2026-06-17
- Weakness: CWE-190
Description
If a SCSI READ(10) command is initiated via USB using the largest LBA (0xFFFFFFFF) with it's default block size of 512 and a count of 1, the first 512 byte of the 0x80000000 memory area is returned to the user. If the block count is increased, the full RAM can be exposed. The same method works to write to this memory area. If RAM contains pointers, those can be - depending on the application - overwritten to return data from any other offset including Progam and Boot Flash.
Affected products
- Microchip Mplab Harmony: from 3.0.0 before 3.13.4 — fixed in 3.13.4
How to fix
Upgrade to a fixed version: Microchip Mplab Harmony 3.13.4. Check the vendor advisory for mitigations.
References
- https://github.com/Fehr-GmbH/blackleak
- https://github.com/Microchip-MPLAB-Harmony/core/blob/master/release_notes.md
- https://github.com/Microchip-MPLAB-Harmony/core/commit/d4608a4f1a140bd899cd4337cdbfb343a4339216
- https://github.com/Fehr-GmbH/blackleak
- https://github.com/Microchip-MPLAB-Harmony/core/blob/master/release_notes.md
- https://github.com/Microchip-MPLAB-Harmony/core/commit/d4608a4f1a140bd899cd4337cdbfb343a4339216
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