What’s Vulnerable › Vulnerabilities

CVE-2025-0647

• Severity: high (CVSS 7.9 v3.1)
• Exploited in the wild: not listed in CISA KEV
• EPSS: 0.2% probability of exploitation in the next 30 days
• Public exploit or detection template: none known
• Published: 2026-01-14 · updated 2026-06-17
• Weakness: CWE-226

Description

In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another PE in the shareability domain. In this case, the PE may retain stale TLB entries which should have been invalidated by the TLBI.

Affected products

• Arm C1-Premium Firmware: all versions
• Arm C1-Ultra Firmware: all versions
• Arm Cortex-A710 Firmware: all versions
• Arm Cortex-X2 Firmware: all versions
• Arm Cortex-X3 Firmware: all versions
• Arm Cortex-X4 Firmware: all versions
• Arm Cortex-X925 Firmware: all versions
• Arm Neoverse-N2 Firmware: all versions
• Arm Neoverse-V2 Firmware: all versions
• Arm Neoverse-V3 Firmware: all versions
• Arm Neoverse-V3Ae Firmware: all versions

References

• https://developer.arm.com/documentation/111546
• https://graph.volerion.com/view?ID=CVE-2025-0647

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